Orinoco start up sequence

[Jouni Malinen]

> On Thu, May 09, 2002 at 11:06:14PM +0200, Nicola76 wrote:
> > 5) read CIS in Attribute Memory (configuration tuple)
> > 6) Write 0x01 in COR register at address 0x3E0, this commutate into I/O mode


This does not sound to be enough.. 0x01 is enable func, but you should
also add levlreq (0x40). Writing 0x41 into COR (usually at 0x3e0)
should be enough, but for completeness sake COR offset and  COR index
(ORed to 0x41) could be determined from CIS.

-- 
Jouni Malinen                                            PGP id EFC895FA